%0 Journal Article
%A Doyle, Patrick
%A Kelly, Shawn K.
%A Ellersick, William F.
%A Shire, Douglas B.
%A Jr., John L. Wyatt,
%A III, Joseph F. Rizzo,
%T  Verilog Modeling of Electrode Interfaces in the Boston Retinal Prosthesis
%B Investigative Ophthalmology & Visual Science
%D 2011
%J Investigative Ophthalmology & Visual Science
%V 52
%N 14
%P 4957-4957
%@ 1552-5783
%X    This work is related to the efforts of the Boston Retinal Implant Project to develop a sub-retinal prosthesis to restore vision to the blind. The specific purpose of this poster is to present results from the use of the Verilog Hardware Description Language (HDL) to model electrode interfaces when developing a custom neurostimulator Application Specific Integrated Circuit (ASIC).     The Verilog HDL is typically used to model binary digital circuitry and to provide a rich programming environment in which to evaluate the behavior of such circuits. However it is not typically used to model the complex interactions of voltage and current that arise in analog circuitry consisting of resistive, capacitive, and inductive elements. In the design of a mixed signal neurostimulator ASIC, models of such elements can be quite useful in order to validate the design of the device. We modeled the electrode interface as a simple R-C circuit in which the capacitive element charged linearly as a function of time and current stimulus. We developed Verilog models of the electrode driver and tissue interface and used those to validate the interconnections between the digital control circuitry and the on-chip Analog to Digital Converter (ADC) used to sample electrode waveforms.     We used floating point variables to model the voltage drop across a 10kOhm resistor and the charge accumulation on a 200nF capacitor when driven by a programmable stimulus current. We used our ADC model to convert the real variable back to a discrete 10-bit value and demonstrated that we could capture those samples into the on-chip memory of the device.     By using pure Verilog models of the analog circuitry of our device we were able to validate the interconnect circuitry. Such validations are crucial to detecting design flaws early in the development process. They also allow for a greater degree of testing in the simulation environment to explore other electrode-tissue models.   
%[ 1/27/2021