Abstract
Abstract: :
Purpose: To develop and apply implantable stimulator chips for retina implants. Methods: A chip design technology for implantable stimulators in 0.7 µm CMOS technology with 50 separate stimulator channels was developed. Mixed-signal (analog + digital) chip design was performed with CADENCE software. Subsequently, chips were fabricated at a commercial chip foundry. Function of the stimulator chip was tested in combination with appropriate stimulation electrodes on implantable microcontact foils with impedances of at least 20 kOhm. Baseline power consumption of the entire chip was about 200 µWatt. Typical data transmission rate was set to 15 Mbit/sec. The implantability of the chip was enhanced by reducing the surface to 4 mm². Results: Various current pulse profiles could be generated on-chip in a wide parameter range of time (20 µsec - 5 msec) and amplitude (2 - 150 µA). Continuous stimulation tests with a microcontact foil in Ringer solution were successfully performed using for example bi-phasic pulses with amplitudes of 50 µA at repetition rates of 100 msec over more than two months. Specific multichannel chips, which had a fixed limitation of pulse amplitudes to 100 µA for safety reasons, were tested for application in animal and human studies (Eckmiller et al. ARVO 2002). Conclusion: Development of appropriate stimulator chips for epiretinal retina implants requires a combination of skills of neurobiology and low power, mixed-signal chip design. Stimulator chips with at least 50 separate channels for assembly with implantable microcontact foils can be successfully fabricated for active medical device applications.
Keywords: 394 electrophysiology: non-clinical • 559 retinal connections, networks, circuitry • 554 retina